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Ferroelectric devices push reservoir computing forward

15 Apr 2026 Lorna Brigham

By pairing a ferroelectric capacitor with a linear capacitor, researchers create a power‑efficient device with tuneable memory and strong nonlinear responses

Computing illustration
Computing illustration (Courtesy: iStock/Devrimb)

Reservoir computing is a computational approach well suited to time‑dependent tasks such as speech recognition, because it relies on internal dynamics, nonlinear responses, and short‑term memory of recent inputs. However, most hardware implementations consume too much power and lack the rich dynamics needed for complex problems. In this study, the researchers introduce a new reservoir‑computing device made by connecting a ferroelectric capacitor (FC) in series with a linear capacitor (LC). This FC-LC device naturally provides the two essential ingredients of a reservoir: nonlinearity, through polarization switching and back‑switching in the ferroelectric layer, and fading memory, through slow charge accumulation and relaxation.

The device offers several advantages over existing reservoir hardware. It operates at extremely low power, produces a direct voltage output without extra circuitry, and has widely tuneable time constants, allowing it to respond quickly or slowly depending on the task. It also supports bidirectional operation, which increases the richness of its internal states and improves performance on classification tasks. By combining FC-LC devices with different time constants, the researchers create a hybrid reservoir with even greater computational capacity.

The system performs exceptionally well on a range of benchmarks, including heartbeat anomaly detection, waveform classification, multimodal digit recognition, and prediction of chaotic time‑series data. Because the device can be fabricated using established semiconductor processes and can be extended to widely used ferroelectric materials such as hafnium oxide, it is well positioned for large‑scale integration and future commercial reservoir‑computing hardware. This work lays the foundation for scalable, energy‑efficient reservoir systems that could enable fast, on‑chip processing in next‑generation electronics.

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