Graphene could have great potential as a material for making tiny electronic devices because it is both a semiconductor and a very good electrical conductor – and at just one atom thick, it is about as small as you can get.

Physicists had speculated that graphene could form a p-n junction — which is a basic building block of a transistor — by placing positive and negative electrodes next to the surface of graphene. The positive electrode would attract electrons to the region of graphene below it, creating an area of excess negative charge (an n-type semiconductor). Similarly, the negative electrode repels electrons and creates an area of excess positive charge (a p-type semiconductor). In other words, the graphene now has p-type and n-type regions with a well defined “p-n junction” in the area between the two electrodes.

However, it is not easy to place a tiny metal electrode (or local gate) very near to the surface of graphene without damaging the graphene or changing its electrical properties. The obvious solution is to first deposit a very thin insulating layer on the graphene followed by the metal electrode – but it has proved hard to find an insulating material that will form an extremely thin and well-ordered layer on graphene.

Now, Charles Marcus and colleagues at Harvard University have cracked this problem using atomic layer deposition (ALD) to create a suitable insulating layer by depositing successive layers of nitrogen oxide, trimethylaluminium, and aluminium oxide onto graphene. A metal electrode of titanium and gold was then deposited on top of the insulator.

Marcus told Physics Web that the technique was borrowed from chemists, who had developed it to coat carbon nanotubes, which are essentially graphene sheets rolled up into tubes.

According to Pablo Jarillo-Herrero, a physicist at New York’s Columbia University, who is part of a separate group investigating the use of ALD on graphene, the major advantage of this technique is that it can be used to create a insulating layer with a relatively high dielectric constant compared to other techniques using silicon oxide or polymethyl methacrylate (PMMA). A high dielectric constant is important in very small electronic devices because it allows large enough electric fields to be applied without electrical breakdown occurring across the insulator.

The graphene sheet itself rests on a silicon substrate coated with an insulating layer of silicon oxide. The silicon acted as the second electrode controlling the p-n junction. The researchers measured the resistance of the graphene as a function of the voltages applied to the electrodes – measurements that confirmed that the graphene contained p-type and n-type regions.

To convince themselves that the device was indeed only one atomic layer thick, the team applied a large magnetic field to the device to see if they could observe the quantum Hall effect – the quantization of the conductance of charge carriers, which only occurs in 2D systems. Marcus and colleagues observed the quantum Hall effect in both negative and positive carriers as predicted by a theoretical paper also published in Scienceexpress by Lenoid Levitov and Dima Abanin of the Massachusetts Institute of Technology (Sciencexpress DOI: 10.1126/science.1144672).

Although the team was able to create a graphene p-n junction, Marcus was quick to point out the unlike other semiconductor materials, their device had no energy gap. This means that the junction could not be used in a practical transistor to switch electrical currents. However, physicists already know that graphene can be made to have a band gap if it were fabricated in a very narrow ribbon. Marcus is currently investigating how to apply their ALD technique to creating devices based on narrow strips of graphene that could function as useful transistors.

Meanwhile at Columbia University, Jarillo-Herrero and colleagues are also working on a scheme to create a graphene transistor using graphene ribbons and ALD.